1. Field of the Invention
The present invention relates to a DMA (Direct Memory Access) processing device for communication equipment and a method thereof. More particularly, the invention relates to such a device and method to decrease the retransmission of messages that may be caused by the absence of DMA information for communication equipment in the local area network.
2. Discussion of Related Art
A high speed user-level network usually employs DMA accesses so that messages can be sent to user-space directly from communication equipment. To realize the DMA accesses, communication equipment has to hold the virtual address of a space to store the ID and messages of user-process and the physical address of a main memory device corresponding to these two data, in the form of tables which is termed TLB (Translation Look-aside Buffer). On receiving a message, communication equipment searches for the physical address of the main memory device from its TLB, and sends the message to the main memory device indicated by the physical address via DMA accesses.
Hereafter, a DMA processing method for communication equipment according to prior art is described in detail with reference to the attached drawings.
FIG. 1 is a schematic of a DMA processing device between communication equipment and main memory device, and FIG. 2 is a flow diagram illustrating a DMA processing method between them.
Referring to FIG. 1, communication equipment 102 and main memory device 101 exchange information via system buses and the main memory device 101 allots a defined area 104 to the respective processs.
Memory 103 stores all types of information of communication equipment 102 and includes a send queue 105 storing the size of message to be sent via communication equipment 102, and a virtual address; and a receive buffer reservation queue 106 holding information regarding the space where the message received by communication equipment 102 will be stored. The area 104 of the main memory device allotted to each of different processes includes a receive queue 107 having information regarding the space where the message arrived through communication equipment 102 is stored; a send buffer 108 storing the message to be sent via communication equipment 102; a free buffer 109 storing the message that will arrive via communication equipment 102; and a receive buffer 110 storing the message received through communication equipment 102.
Send queue 105 and receive buffer reservation queue 106 store the process ID, and the starting address (virtual address) and size of the buffer, while receive queue 107 stores the starting address (virtual address) and size.
FIG. 2 is a flow diagram illustrating communication equipment 103 as described above in more detail, that is, a DMA processing between communication equipment 103 and main memory device 101.
Referring to FIG. 2, communication equipment 103 includes a TLB 201, and a queue 202 for storing information about the process for processing and managing messages externally applied, and a kernel 205 for helping the DMA processing between communication equipment 103 and main memory device 101 is provided on the outside of communication equipment 103. TLB 201 stores the IDs and virtual addresses (P1.V.sub.-- addr, P2V.sub.-- addr, P1.V.sub.-- addr, . . . , P7.V.sub.-- addr) for the processs related to the communication equipment 103, and the physical addresses (phypage frame #) for the main memory device 101.
When a message 203 for a process P1 is received by queue 202 (S201), communication equipment 103 searches for the virtual address of the page for main memory device 101 allotted to store the ID and message of process P1, thereby searching for TLB 201 and obtaining the physical address of the page for the main memory device (S202, TLB hit). Then, it directly gives an access to the page of the main memory device with the address via DMA (S203) and stores the received message 203.
These are all carried out by the processor of communication equipment, thus without spending too much time and missing the received messages.
However, when a message 204 is being transferred to process Pn with communication equipment (S204), communication equipment 103 cannot search for either TLB 201 or physical address 203 since there is no TLB for the process Pn (S205, TLB miss). In such case, communication equipment 103 has to require the kernel 205 to process the TLB miss (S206). A processing routine with kernel 205 takes a long time and results in missing the received message 206, which makes it necessary to retransmit the message and causes a significant deterioration of network performances.
It has hardly been secured with the current technologies that the TLB of communication equipment holds information about the page of the main memory device of the process at which the transferred messages arrive finally. A potential TLB miss as described above might occur and information about the page of the main memory device of the process has to be obtained through the aid of the kernel, in which case, the messages are possibly lost in sending and receiving a large data because of requirement for a long time, causing a trouble to retransmit the missed messages. It is thus required to have a process wholly responsible for the reception of messages in case of TLB misses in order to prevent the absence of information about the page of the main memory device in communication equipment and reduce the necessity to retransmit messages.